rockpool.devices.xylo.syns65302.afe.params
Design parameters for XyloAudio 3 Audio Frontend.
NOTE: Refer to the following documentation file for further details on the design https://spinystellate.office.synsense.ai/saeid.haghighatshoar/agc-for-xylo-v3/blob/master/README.md
Module Attributes
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Due to the differential design of the amplifier |
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The system clock |
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Audio sampling rate of ~48.8 kHz |
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Audio sampling rate of ~50.0 kHz |
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Number of bits allocated for AGC path's digital output |
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Number of bits devoted to the final sampled audio obtained after low-pass filtering + decimation. |
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The upper limit for human audio spectrum 20 kHz |
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Used as transition widths, set to 20% of the cutoff frequency |
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Oversampling factor, how much the signal needs to be decimated or subsampled |
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Sampling rate/clock rate of PDM module. |
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Order of the deltasigma modulator (conventional ones are 2 or 3) |
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Length of the designed FIR filter |
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Number of bits used for quantizing the filter coefficients |
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The settling time (due to working point variation) in PGA NOTE: this is at the moment less than half clock period. |
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high-pass corner due to AC coupling |
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low-pass corner due to frequency response or low-pass filtering (e.g., anti-aliasing low-pass filter) |
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maximum target gain for PGA |
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Number of bits assigned to command from envelope controller (EC) to programmable-gain amplifier (PGA) |
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Gain vector used in the design of AGC NOTE: we use an exponential gain pattern but other gain patterns are also possible |
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We have a fixed-gain mode for PGA where PGA ignores the gain-change commands it receives from EC module. |
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default rise time-constant used for estimating the envelope |
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default fall time-constant used for estimating the envelope |
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Saturation level boundary NOTE: we should set the saturation level a little bit lower for two reasons (i) when it is low, the system is more cautious and, when the signal becomes strong suddenly, goes outside saturation very fast. (ii) at the moment, we are using an oversampled ADC with decimation filter where as a result of processing, the quantized signal may not have full rail-to-rail dynamics due to some inner attenuation. If we use a very large saturation level, the weak signal after attenuation may indeed be in saturation but not get detected by EC. |
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Waiting times used for waiting before any gain switch |
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Maximum waiting time before change gain NOTE: This parameter makes sure that the gain change happens with at least some interval independent of how much it is delayed! |
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Reliable hysteresis in detecting the maximum NOTE: to make sure that waiting times are working well, we need to extend waiting times when the signal amplitude increase is significant we measure this by a hysteresis parameter which should be typically around 2 ~ 10 for an ADC with 10 bits |
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Threshold amplitude levels NOTE (1): here we are working with the exponential amplitude levels that match the exponential pattern of the gains sequence in PGA. |
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In gain smoother we need to adjust the gain slowly to avoid fast gain jump. |
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number of bits used for quantizing the gain ratio |
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Total number of filters in the filter bank |
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Maximum number of spikes that input neurons can handle |