rockpool.devices.xylo.syns65302.afe.agc.adc

This module implements the ADC as a state machine.

NOTE: this modules consists of a possibly oversampled ADC followed by an anti-aliasing and decimation filter implemented in the digital domain. The anti-aliasing filter is implemented as an IIR low-pass filter + decimation via some fine-tuning and optimization.

NOTE: This module contains the block-diagram implementation of the filter to make sure that it is compatible with Hardware.

To design this filter, we apply optimization to reduce the aliasing noise due to sampling as much as possible. We use the class of IIR Elliptic filters to get the sharpest transition and smallest aliasing noise. Also we use an optimized truncation method so that:

  • the dynamic range of the ADC does not drop due to worst-case vs. average case amplitude gain of the filter.

  • only a slight nonlinearity is introduced (truncation) only when the signal amplitude is quite large.

For further details on the implementation of this filter and its performance evaluation, please refer to the original design repo https://spinystellate.office.synsense.ai/saeid.haghighatshoar/anti-aliasing-filter-for-xylo-a2

Classes

ADC(*args, **kwargs)

Equivalent ADC: consisting of oversampled ADC + anti-aliasing decimation filter

AntiAliasingDecimationFilter(*args, **kwargs)

Simulate the block-diagram model of the decimation anti-aliasing filter

BlockDiagram(oversampling_factor, fs, ...[, ...])

Exceptions

FilterOverflowError